The present invention relates generally to the storage of data in a computer system whose elements are connected to the system by an interface bus. More particularly, the invention is directed to a method and apparatus for storing and retrieving error check information used in determining whether data stored in and retrieved from mass storage devices in the system contains errors.
In general, error checking in a computer system may use a complex calculation to generate a value based on transmitted data. A check value is generated for and appended to an entire sector of data transferred from the host to a storage device in the computer system. When this same sector of data is retrieved from the storage device to the host, a check value is generated for the data portion and is compared with the appended check value to determine whether an error occurred during the transfer. Some possible types of error checking schemes are a checksum, a cyclic redundancy checksum (CRC), or parity checking, each of which are known in the art. The term "checksum" will be used hereinafter to describe error check information generally. It should be understood that the present invention may be applied to any error checking scheme.
The interface bus enables a host computer (or multiple hosts) to communicate with different classes of peripheral devices without major modifications to the overall system. Thus, different disk drives, tape drives, printers or communication devices can be added to the computer system interconnected by a device bus. For example, the host may write data to and retrieve data from a disk drive array. The disk drive array typically includes a controller to interface between the device bus and the system bus. The controller is then coupled to other controllers in the overall system and a data buffer across a system bus. Therefore, assuming there are a plurality of disk drive arrays, there will be a corresponding plurality of device bus controllers to interface between the system bus and drive arrays.
Multiple device bus controllers and multiple host bus controllers share a common storage data buffer across a system bus, as mentioned above. The buffer holds data being transferred between the host computer and system storage devices, such as the disk drive array. Each time a device bus controller or a host bus controller accesses the buffer for a data transfer, it may transfer only a portion of a sector with the buffer. Due to a mismatch in transfer rates between the interface bus and the system bus, the device bus controller or host bus controller releases control of the system bus if its internal buffer can no longer accommodate more data. Therefore, in order to transfer an entire sector of data, a device bus controller or a host bus controller may perform multiple accesses to the system data buffer. If, as is often the case, the multiple bus controllers require simultaneous access to the data buffer to transfer data, the multiple accesses for any given device bus controller or host bus controller may be interleaved with those from other bus controllers.
When the accesses are interleaved, in order to calculate and append the checksum at the end of a sector after all accesses for a sector have been completed, the system must include code components that determine which bus controller is accessing the data buffer, whether the current access is at the beginning or in the middle of a sector, when the bus controller has completed its current access and whether the end of a sector has been reached. If the access is to the beginning of a sector, the storage subsystem control logic must use an initial seed checksum value to calculate a partial checksum for the first portion of the sector being transferred. If the access is to the middle of a sector, the control logic must retrieve the partial checksum from a storage device and use this partial checksum to calculate an updated checksum for all portions of the sector that have been transferred up to this point. If the end of a sector has not been reached, then the updated partial checksum must be stored again in the buffer for future updating. If the end of the sector has been reached, however, the final checksum is written in the buffer location following the location containing the last written data from the associated sector.
The error checking system described above requires additional hardware as well as the complex code. Multiple registers are required to support the multiple device bus controllers and multiple host bus controllers, for example, one memory register for each controller to temporarily store the partial checksum for future updating.